NEWS

VLSI Design and Verification: Advanced coverage and Assertion based Verification 03 December 2025

Department of Electronics and Communication Engineering

Department of Electronics and Communication Engineering in association with RJ Semiconductors organizing 4 days Hands on Workshop session Phase-2 on "VLSI Design and Verification: Advanced coverage and Assertion based Verification" for 5th semester ECE students from 02/12/25 to 05/12/25.
Resource Persons:  
1. Harish. Skill trainer, RJ Semiconductor.
2. sachin. Skill trainer, RJ Semiconductor.

#pescollegeofengineering #pesmandya #pesce #pescemandya #electronics #engineering  #trainingsesssion #technology #workshop #training #session #VLSI #verification #verilog